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Message-ID: <20110617135056.GE18054@aftab>
Date:	Fri, 17 Jun 2011 15:50:56 +0200
From:	Borislav Petkov <bp@...64.org>
To:	Pavel Machek <pavel@....cz>
Cc:	"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Tony Luck <tony.luck@...el.com>
Subject: Re: [PATCH] MAINTAINERS: Add x86 RAS people

On Fri, Jun 17, 2011 at 09:27:58AM -0400, Pavel Machek wrote:
> On Tue 2011-06-14 18:08:54, Borislav Petkov wrote:
> > Announce the new RAS infrastructure maintainers. The file patterns below
> > will change after we start the restructuring.
> > 
> > Signed-off-by: Borislav Petkov <bp@...64.org>
> > Signed-off-by: Tony Luck <tony.luck@...el.com>
> >  
> > +X86 RAS INFRASTRUCTURE
> > +M:	Tony Luck <tony.luck@...el.com>
> 
> this would be great place to explain "ras"...

Wikipedia has a basic overview: http://en.wikipedia.org/wiki/Reliability,_Availability_and_Serviceability

Our idea is to make error collection and reporting much more easy to
configure and much easily manageable now that reliability features are
much more important on x86. You want to be able to enforce policies
from userspace like, for example, counting errors per hw device (DRAM
ECC errors per DIMM, for example) and undertake actions when thresholds
are reached, implement a much better unified error injection scheme for
testing system reliability, etc.

Another important issue is saving oops information to persistent storage
so that it can be evaluated after reboot. While this is easy to do on
servers with their nvram, we still have no solution for general purpose
laptops. hpa had a project with oopses represented with a 2d barcode but
I still haven't had a chance to look into that.

So things like that, I'm pretty sure I'm leaving something out but you
should be getting the idea...

-- 
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
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