| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <BANLkTimKpnbus2rStk7V4-2sbv5cUbz8NA@mail.gmail.com>
Date: Thu, 23 Jun 2011 14:31:14 +0200
From: Stephane Eranian <eranian@...gle.com>
To: Cyrill Gorcunov <gorcunov@...il.com>
Cc: Don Zickus <dzickus@...hat.com>,
Peter Zijlstra <a.p.zijlstra@...llo.nl>,
Ingo Molnar <mingo@...e.hu>, Lin Ming <ming.m.lin@...el.com>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Frederic Weisbecker <fweisbec@...il.com>,
Vince Weaver <vweaver1@...s.utk.edu>,
lkml <linux-kernel@...r.kernel.org>
Subject: Re: [RFC -tip] perf, x86: Add PERF_COUNT_HW_NMI_WATCHDOG event v2
Yes.
On Thu, Jun 23, 2011 at 2:26 PM, Cyrill Gorcunov <gorcunov@...il.com> wrote:
> On Thu, Jun 23, 2011 at 04:07:32PM +0400, Cyrill Gorcunov wrote:
>> On Thu, Jun 23, 2011 at 02:03:50PM +0200, Stephane Eranian wrote:
>> ...
>> > >
>> > No, first level in watchdog.c, the other callback has to be implemented
>> > from x86_pmu as you had it.
>> >
> Something like below I suppose
>
> Cyrill
> ---
> arch/x86/kernel/cpu/perf_event.c | 7 +++++++
> arch/x86/kernel/cpu/perf_event_p4.c | 26 ++++++++++++++++++++++++++
> kernel/watchdog.c | 6 +++++-
> 3 files changed, 38 insertions(+), 1 deletion(-)
>
> Index: linux-2.6.git/arch/x86/kernel/cpu/perf_event.c
> ===================================================================
> --- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event.c
> +++ linux-2.6.git/arch/x86/kernel/cpu/perf_event.c
> @@ -233,6 +233,7 @@ struct x86_pmu {
> void (*enable_all)(int added);
> void (*enable)(struct perf_event *);
> void (*disable)(struct perf_event *);
> + void (*hw_watchdog_set_attr)(struct perf_event_attr *attr);
> int (*hw_config)(struct perf_event *event);
> int (*schedule_events)(struct cpu_hw_events *cpuc, int n, int *assign);
> unsigned eventsel;
> @@ -315,6 +316,12 @@ static u64 __read_mostly hw_cache_extra_
> [PERF_COUNT_HW_CACHE_OP_MAX]
> [PERF_COUNT_HW_CACHE_RESULT_MAX];
>
> +void hw_nmi_watchdog_set_attr(struct perf_event_attr *wd_attr)
> +{
> + if (x86_pmu.hw_watchdog_set_attr)
> + x86_pmu.hw_watchdog_set_attr(wd_attr);
> +}
> +
> /*
> * Propagate event elapsed time into the generic event.
> * Can only be executed on the CPU where the event is active.
> Index: linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
> ===================================================================
> --- linux-2.6.git.orig/arch/x86/kernel/cpu/perf_event_p4.c
> +++ linux-2.6.git/arch/x86/kernel/cpu/perf_event_p4.c
> @@ -705,6 +705,31 @@ static int p4_validate_raw_event(struct
> return 0;
> }
>
> +static void p4_hw_watchdog_set_attr(struct perf_event_attr *wd_attr)
> +{
> + /*
> + * Watchdog ticks are special on Netburst, we use
> + * that named "non-sleeping" ticks as recommended
> + * by Intel SDM Vol3b.
> + */
> + WARN_ON_ONCE(wd_attr->type != PERF_TYPE_HARDWARE ||
> + wd_attr->config != PERF_COUNT_HW_CPU_CYCLES);
> +
> + wd_attr->type = PERF_TYPE_RAW;
> + wd_attr->config =
> + p4_config_pack_escr(P4_ESCR_EVENT(P4_EVENT_EXECUTION_EVENT) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, NBOGUS0) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, NBOGUS1) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, NBOGUS2) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, NBOGUS3) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, BOGUS0) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, BOGUS1) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, BOGUS2) |
> + P4_ESCR_EMASK_BIT(P4_EVENT_EXECUTION_EVENT, BOGUS3)) |
> + p4_config_pack_cccr(P4_CCCR_THRESHOLD(15) | P4_CCCR_COMPLEMENT |
> + P4_CCCR_COMPARE);
> +}
> +
> static int p4_hw_config(struct perf_event *event)
> {
> int cpu = get_cpu();
> @@ -1179,6 +1204,7 @@ static __initconst const struct x86_pmu
> .cntval_bits = ARCH_P4_CNTRVAL_BITS,
> .cntval_mask = ARCH_P4_CNTRVAL_MASK,
> .max_period = (1ULL << (ARCH_P4_CNTRVAL_BITS - 1)) - 1,
> + .hw_watchdog_set_attr = p4_hw_watchdog_set_attr,
> .hw_config = p4_hw_config,
> .schedule_events = p4_pmu_schedule_events,
> /*
> Index: linux-2.6.git/kernel/watchdog.c
> ===================================================================
> --- linux-2.6.git.orig/kernel/watchdog.c
> +++ linux-2.6.git/kernel/watchdog.c
> @@ -200,6 +200,8 @@ static int is_softlockup(unsigned long t
> }
>
> #ifdef CONFIG_HARDLOCKUP_DETECTOR
> +void __weak hw_nmi_watchdog_set_attr(struct perf_event_attr *wd_attr) { }
> +
> static struct perf_event_attr wd_hw_attr = {
> .type = PERF_TYPE_HARDWARE,
> .config = PERF_COUNT_HW_CPU_CYCLES,
> @@ -368,9 +370,11 @@ static int watchdog_nmi_enable(int cpu)
> if (event != NULL)
> goto out_enable;
>
> - /* Try to register using hardware perf events */
> wd_attr = &wd_hw_attr;
> wd_attr->sample_period = hw_nmi_get_sample_period(watchdog_thresh);
> + hw_nmi_watchdog_set_attr(wd_attr);
> +
> + /* Try to register using hardware perf events */
> event = perf_event_create_kernel_counter(wd_attr, cpu, NULL, watchdog_overflow_callback);
> if (!IS_ERR(event)) {
> printk(KERN_INFO "NMI watchdog enabled, takes one hw-pmu counter.\n");
>
Powered by blists - more mailing lists