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Message-ID: <alpine.DEB.2.00.1106281230010.3859@cl320.eecs.utk.edu>
Date: Tue, 28 Jun 2011 12:32:06 -0400 (EDT)
From: Vince Weaver <vweaver1@...s.utk.edu>
To: Robert Richter <robert.richter@....com>
cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Paul Mackerras <paulus@...ba.org>, Ingo Molnar <mingo@...e.hu>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
Stephane Eranian <eranian@...gle.com>,
"Przywara, Andre" <Andre.Przywara@....com>
Subject: Re: [patch] perf_events: even more wrong events for AMD fam10h
On Mon, 27 Jun 2011, Robert Richter wrote:
>
> do you think it is worth to introduce l1-dcache-access?
It could be useful to have. On PAPI we have the equivelent
PAPI_L1_DCA and all AMD processors support it, as do all
Intel except atom. POWER does not though, at least not
directly.
Vince
vweaver1@...s.utk.edu
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