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Date:	Mon, 4 Jul 2011 16:07:31 +0200
From:	Samuel Ortiz <sameo@...ux.intel.com>
To:	Sangbeom Kim <sbkim73@...sung.com>
Cc:	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] mfd: Add initial S5M8751 support

Hi,

On Wed, Jun 22, 2011 at 02:53:56PM +0900, Sangbeom Kim wrote:
> +#define SLEEPB_ENABLE		1
> +#define SLEEPB_DISABLE		0
> +
> +static DEFINE_MUTEX(io_mutex);
I would prefer to see your IO mutex defined from your s5m8751 structure.


> +int s5m8751_clear_bits(struct s5m8751 *s5m8751, uint8_t reg, uint8_t mask)
> +{
> +	uint8_t reg_val;
> +	int ret = 0;
> +
> +	ret = s5m8751_reg_read(s5m8751, reg, &reg_val);
> +	if (ret)
> +		return ret;
> +
> +	reg_val &= ~mask;
> +	ret = s5m8751_reg_write(s5m8751, reg, reg_val);
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(s5m8751_clear_bits);
> +
> +int s5m8751_set_bits(struct s5m8751 *s5m8751, uint8_t reg, uint8_t mask)
> +{
> +	uint8_t reg_val;
> +	int ret = 0;
> +
> +	ret = s5m8751_reg_read(s5m8751, reg, &reg_val);
> +	if (ret)
> +		return ret;
> +
> +	reg_val |= mask;
> +	ret = s5m8751_reg_write(s5m8751, reg, reg_val);
> +
> +	return ret;
> +}
> +EXPORT_SYMBOL_GPL(s5m8751_set_bits);
Your locking for both of those routines is also racy. There's nothing
preventing a writre to happen between your read and your write. They need to
happen atomically, and for that you need to take the lonk in the clear/set
bits routine.

Cheers,
Samuel.

-- 
Intel Open Source Technology Centre
http://oss.intel.com/
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