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Message-Id: <1309872887.2381.10.camel@localhost>
Date:	Tue, 05 Jul 2011 21:34:47 +0800
From:	Lin Ming <ming.m.lin@...el.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	Ingo Molnar <mingo@...e.hu>, Andi Kleen <andi@...stfloor.org>,
	Stephane Eranian <eranian@...gle.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/4] perf, x86: Add Intel Nhm/Wsm/Snb load latency
 support

On Tue, 2011-07-05 at 21:17 +0800, Peter Zijlstra wrote:
> On Mon, 2011-07-04 at 08:02 +0000, Lin Ming wrote:
> > +#define INTEL_EVENT_EXTRA_REG2(event, msr, vm)    \
> > +       EVENT_EXTRA_REG(event, msr, ARCH_PERFMON_EVENTSEL_EVENT | \
> > +                       ARCH_PERFMON_EVENTSEL_UMASK, vm) 
> 
> That's inconsistent wrt the normal constraints, INTEL_UEVENT_EXTRA_REG
> would be the consistent name.
> 
> #define INTEL_UEVENT_EXTRA_REG(event, msr, vm)	\
> 	EVENT_EXTRA_REG(event, msr, INTEL_ARCH_EVENT_MASK, vm)

Right, thanks.


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