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Message-ID: <20110711101913.652c07cc@endymion.delvare>
Date: Mon, 11 Jul 2011 10:19:13 +0200
From: Jean Delvare <khali@...ux-fr.org>
To: Andi Kleen <andi@...stfloor.org>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org,
akpm@...ux-foundation.org, Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 2/3] x86, intel: Use cpu_update for Atom errata check
On Wed, 6 Jul 2011 16:57:02 -0700, Andi Kleen wrote:
> From: Andi Kleen <ak@...ux.intel.com>
>
> Now that the cpu update level is available the Atom PSE errata
> check can use it directly without reading the MSR again.
>
> Signed-off-by: Andi Kleen <ak@...ux.intel.com>
> ---
> arch/x86/kernel/cpu/intel.c | 15 ++++-----------
> 1 files changed, 4 insertions(+), 11 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
> index ebedd27..6f75c45 100644
> --- a/arch/x86/kernel/cpu/intel.c
> +++ b/arch/x86/kernel/cpu/intel.c
> @@ -55,17 +55,10 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
> * need the microcode to have already been loaded... so if it is
> * not, recommend a BIOS update and disable large pages.
> */
> - if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_mask <= 2) {
> - u32 ucode, junk;
> -
> - wrmsr(MSR_IA32_UCODE_REV, 0, 0);
> - sync_core();
> - rdmsr(MSR_IA32_UCODE_REV, junk, ucode);
> -
> - if (ucode < 0x20e) {
> - printk(KERN_WARNING "Atom PSE erratum detected, BIOS microcode update recommended\n");
> - clear_cpu_cap(c, X86_FEATURE_PSE);
> - }
> + if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_mask <= 2 &&
> + c->microcode < 0x20e) {
> + printk(KERN_WARNING "Atom PSE erratum detected, BIOS microcode update recommended\n");
> + clear_cpu_cap(c, X86_FEATURE_PSE);
> }
>
> #ifdef CONFIG_X86_64
Looks good.
Acked-by: Jean Delvare <khali@...ux-fr.org>
--
Jean Delvare
--
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