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Message-Id: <1310510298-16360-1-git-send-email-chris@chris-wilson.co.uk>
Date: Tue, 12 Jul 2011 23:38:18 +0100
From: Chris Wilson <chris@...is-wilson.co.uk>
To: Dave Airlie <airlied@...ux.ie>
Cc: dri-devel@...ts.freedestop.org, linux-kernel@...r.kernel.org,
Chris Wilson <chris@...is-wilson.co.uk>,
Konstantin Belousov <kostikbel@...il.com>,
Daniel Vetter <daniel.vetter@...ll.ch>
Subject: [PATCH] agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2M
Konstantin Belousov found an error in the define of G4x_GMCH_SIZE_VT_2M
relative to the GMCH specs, and confirmed that indeed one of his users
with a Q45 reports 0xb not 0xc for a 2/2MiB GATT.
Signed-off-by: Chris Wilson <chris@...is-wilson.co.uk>
Cc: Konstantin Belousov <kostikbel@...il.com>
Cc: Daniel Vetter <daniel.vetter@...ll.ch>
Acked-by: Daniel Vetter <daniel.vetter@...ll.ch>
---
drivers/char/agp/intel-agp.h | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 999803c..5da67f1 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -90,9 +90,10 @@
#define G4x_GMCH_SIZE_MASK (0xf << 8)
#define G4x_GMCH_SIZE_1M (0x1 << 8)
#define G4x_GMCH_SIZE_2M (0x3 << 8)
-#define G4x_GMCH_SIZE_VT_1M (0x9 << 8)
-#define G4x_GMCH_SIZE_VT_1_5M (0xa << 8)
-#define G4x_GMCH_SIZE_VT_2M (0xc << 8)
+#define G4x_GMCH_SIZE_VT_EN (0x8 << 8)
+#define G4x_GMCH_SIZE_VT_1M (G4x_GMCH_SIZE_1M | G4x_GMCH_SIZE_VT_EN)
+#define G4x_GMCH_SIZE_VT_1_5M ((0x2 << 8) | G4x_GMCH_SIZE_VT_EN)
+#define G4x_GMCH_SIZE_VT_2M (G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)
#define GFX_FLSH_CNTL 0x2170 /* 915+ */
--
1.7.5.4
--
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