linux-kernel - Re: ARM cortex A9 feature

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Message-ID: <20110714194411.GA8942@n2100.arm.linux.org.uk>
Date:	Thu, 14 Jul 2011 20:44:11 +0100
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Dave Hylands <dhylands@...il.com>
Cc:	naveen yadav <yad.naveen@...il.com>, kernelnewbies@...linux.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: ARM cortex A9 feature

On Thu, Jul 14, 2011 at 09:56:34AM -0700, Dave Hylands wrote:
> Hi Naveen,
> 
> On Wed, Jul 13, 2011 at 11:26 PM, naveen yadav <yad.naveen@...il.com> wrote:
> > Hi All,
> >
> > I am reading ARM cortex a9 manual and got few question in mind.
> >
> > 1. Where I need strong order type memory ? any sample example is very helpfull.
> 
> Often when dealing with hardware, you need to ensure that when your code does:
> 
> reg1 = val1;
> reg2 = val2;
> 
> that these writes actually occur in the order that the code issues
> them. Using volatile pointers will get the compiler to not reorder the
> instructions, but you still need the writes to hit the hardware in the
> same order that they were issued. Using strongly ordered memory is one
> way to achieve that.

Note that device memory also gives that an ordering guarantee too.
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