Subject: [PATCH -v2] x86/pci: Add mmconf range into e820 for when it is from MSR with amd faml0h for AMD Fam10h, it we read mmconf from MSR early, we should just trust it because we check it and correct it already. so add it to e820 Also correct the base calulating to make it work below 4g case. -v2: remove unrelated sort_range changes. also make FAM10H_MMIO_CONF_BASE_MASK to be ULL pointed by Jan. Signed-off-by: Yinghai Lu Cc: Jan Beulich --- arch/x86/kernel/mmconf-fam10h_64.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) Index: linux-2.6/arch/x86/kernel/mmconf-fam10h_64.c =================================================================== --- linux-2.6.orig/arch/x86/kernel/mmconf-fam10h_64.c +++ linux-2.6/arch/x86/kernel/mmconf-fam10h_64.c @@ -16,6 +16,7 @@ #include #include #include +#include struct pci_hostbridge_probe { u32 bus; @@ -26,6 +27,21 @@ struct pci_hostbridge_probe { static u64 __cpuinitdata fam10h_pci_mmconf_base; +/* only on BSP */ +static void __init_refok e820_add_mmconf_range(int busnbits) +{ + u64 end; + + end = fam10h_pci_mmconf_base + (1ULL<<(busnbits + 20)) - 1; + if (!e820_all_mapped(fam10h_pci_mmconf_base, end+1, E820_RESERVED)) { + printk(KERN_DEBUG "Fam 10h mmconf [%llx, %llx]\n", + fam10h_pci_mmconf_base, end); + e820_add_region(fam10h_pci_mmconf_base, 1ULL<<(busnbits + 20), + E820_RESERVED); + sanitize_e820_map(); + } +} + static struct pci_hostbridge_probe pci_probes[] __cpuinitdata = { { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 }, { 0xff, 0, PCI_VENDOR_ID_AMD, 0x1200 }, @@ -164,6 +180,7 @@ static void __cpuinit get_fam10h_pci_mmc out: fam10h_pci_mmconf_base = base; + e820_add_mmconf_range(8); } void __cpuinit fam10h_check_enable_mmcfg(void) @@ -189,6 +206,7 @@ void __cpuinit fam10h_check_enable_mmcfg if (!fam10h_pci_mmconf_base) { fam10h_pci_mmconf_base = base; + e820_add_mmconf_range(busnbits); return; } else if (fam10h_pci_mmconf_base == base) return;