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Message-ID: <20110722214305.GU8006@one.firstfloor.org>
Date:	Fri, 22 Jul 2011 23:43:05 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	Andi Kleen <andi@...stfloor.org>, Lin Ming <ming.m.lin@...el.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Ingo Molnar <mingo@...e.hu>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/4] perf: memory load/store events generalization

On Fri, Jul 22, 2011 at 02:14:26PM -0700, Stephane Eranian wrote:
> On Fri, Jul 22, 2011 at 2:01 PM, Andi Kleen <andi@...stfloor.org> wrote:
> >> That looks okay as a first approach tool. But what people are most
> >> often interested in is to see where the misses occur, i.e., you need
> >> to display load/store addresses somehow, especially for the more
> >
> > But that's what it already does?  (for loads, stores
> > are not in there yet) Did you try it?
> >
> I meant displaying the load + data addresses.

That's what it does already.

Or did you mean the instructions that caused them?

-Andi
-- 
ak@...ux.intel.com -- Speaking for myself only.
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