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Message-ID: <20110724033313.GB25722@srcf.ucam.org>
Date: Sun, 24 Jul 2011 04:33:13 +0100
From: Matthew Garrett <mjg@...hat.com>
To: Andy Lutomirski <luto@....edu>
Cc: cpufreq@...r.kernel.org, davej@...hat.com,
linux-kernel@...r.kernel.org, borislav.petkov@....com,
mark.langsdorf@....com, andreas.herrmann3@....com
Subject: Re: [PATCH v4 3/7] acpi-cpufreq: Add support for disabling dynamic
overclocking
On Sat, Jul 23, 2011 at 11:15:02PM -0400, Andy Lutomirski wrote:
> I was curious and looked it up. Intel SDM volume 3, 14.3.2.1 says:
>
> Opportunistic processor performance operation can be disabled by
> setting bit 38 of
> IA32_MISC_ENABLE. This mechanism is intended for BIOS only. If
> IA32_MISC_ENABLE[38] is set, CPUID.06H:EAX[1] will return 0.
Hm. Interesting. The observed behaviour is that it works fine if we
toggle this ourselves, and I don't remember the version of the docs I
was looking at adding the BIOS proviso. Having said that...
> System software can temporarily disengage opportunistic processor
> performance
> operation by setting bit 32 of the IA32_PERF_CTL MSR (0199H), using a read-
> modify-write sequence on the MSR.
This complicates things a little, since right now we just write the
firmware's P state value directly into PERF_CTL. We'd need to add code
to acpi_cpufreq_target to make sure that it masked that bit off. It's a
little more awkward, but if we're being told not to do it by just
hitting the bit in MISC_ENABLE it's probably worth it. I'll try to
handle that this week.
--
Matthew Garrett | mjg59@...f.ucam.org
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