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Message-ID: <20110725174030.GA20835@huya.qualcomm.com>
Date: Mon, 25 Jul 2011 10:40:31 -0700
From: David Brown <davidb@...eaurora.org>
To: ben-linux@...ff.org
Cc: Kenneth Heitke <kheitke@...eaurora.org>, khali@...ux-fr.org,
davidb@...eaurora.org, dwalker@...o99.com,
linux-arm-msm@...r.kernel.org, bryanh@...eaurora.org,
tsoni@...eaurora.org, arve@...roid.com, swetland@...gle.com,
sdharia@...eaurora.org, linux-arm-kernel@...ts.infradead.org,
seth.heasley@...el.com, tomoya-linux@....okisemi.com,
guenter.roeck@...csson.com, linus.walleij@...ricsson.com,
w.sang@...gutronix.de, linux-i2c@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] i2c: QUP based bus driver for Qualcomm MSM chipsets
On Mon, Jun 13, 2011 at 08:21:53PM -0600, Kenneth Heitke wrote:
> This bus driver supports the QUP i2c hardware controller in the Qualcomm
> MSM SOCs. The Qualcomm Universal Peripheral Engine (QUP) is a general
> purpose data path engine with input/output FIFOs and an embedded i2c
> mini-core. The driver supports FIFO mode (for low bandwidth applications)
> and block mode (interrupt generated for each block-size data transfer).
> The driver currently does not support DMA transfers.
>
> Signed-off-by: Kenneth Heitke <kheitke@...eaurora.org>
Ben, I was wondering if there were any outstanding issues with this
driver that Ken needs to address, or if it just got overlooked.
FWIW:
Acked-By: David Brown <davidb@...eaurora.org>
Thanks,
David
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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