[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20110726094648.2100f149@jbarnes-desktop>
Date: Tue, 26 Jul 2011 09:46:48 -0700
From: Jesse Barnes <jbarnes@...tuousgeek.org>
To: Keith Packard <keithp@...thp.com>
Cc: Dave Airlie <airlied@...hat.com>, intel-gfx@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915: DP_PIPE_ENABLED must check
transcoder on CPT
On Mon, 25 Jul 2011 23:36:34 -0700
Keith Packard <keithp@...thp.com> wrote:
> Display port pipe selection on CPT is not done with a bit in the
> output register, rather it is controlled by a couple of bits in the
> separate transcoder register which indicate which display port output
> is connected to the transcoder.
>
> This patch replaces the simplistic macro DP_PIPE_ENABLED with the
> rather more complicated function dp_pipe_enabled which checks the
> output register to see if that is enabled, and then goes on to either
> check the output register pipe selection bit (on non-CPT) or the
> transcoder DP selection bits (on CPT).
>
> Before this patch, any time the mode of pipe A was changed, any
> display port outputs on pipe B would get disabled as
> intel_disable_pch_ports would ensure that the mode setting operation
> could occur on pipe A without interference from other outputs
> connected to that pch port
>
> Signed-off-by: Keith Packard <keithp@...thp.com>
> ---
Ah nice catch. I expect one day we'll have all the chipset and PCH
differences coded...
Reviewed-by: Jesse Barnes <jbarnes@...tuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists