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Message-ID: <4E39D400.2080507@zytor.com>
Date:	Wed, 03 Aug 2011 16:04:32 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Len Brown <lenb@...nel.org>
CC:	linux-pm@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
	Len Brown <len.brown@...el.com>
Subject: Re: [PATCH 1/5] mrst_pmu: driver for Intel Moorestown Power Management
 Unit

On 08/03/2011 12:44 PM, Len Brown wrote:
> From: Len Brown <len.brown@...el.com>
> 
> The Moorestown (MRST) Power Management Unit (PMU) driver
> directs the SOC power states in the "Langwell" south complex (SCU).
> 
> It hooks pci_platform_pm_ops[] and thus observes all PCI ".set_state"
> requests.  For devices in the SC, the pmu driver translates those
> PCI requests into the appropriate commands for the SCU.
> 
> The PMU driver helps implement S0i3, a deep system idle power idle state.
> Entry into S0i3 is via cpuidle, just like regular processor c-states.
> S0i3 depends on pre-conditions including uni-processor, graphics off,
> and certain IO devices in the SC must be off.  If those pre-conditions
> are met, then the PMU allows cpuidle to enter S0i3, otherwise such requests
> are demoted, either to Atom C4 or Atom C6.
> 
> This driver is based on prototype work by Bruce Flemming,
> Illyas Mansoor, Rajeev D. Muralidhar, Vishwesh M. Rudramuni,
> Hari Seshadri and Sujith Thomas.  The current driver also
> includes contributions from H. Peter Anvin, Arjan van de Ven,
> Kristen Accardi, and Yong Wang.
> 
> Thanks for additional review feedback from Alan Cox and Randy Dunlap.
> 
> Signed-off-by: Len Brown <len.brown@...el.com>
> Acked-by: Alan Cox <alan@...ux.intel.com>
> ---
>  MAINTAINERS                     |    6 +
>  arch/x86/platform/mrst/Makefile |    1 +
>  arch/x86/platform/mrst/pmu.c    |  817 +++++++++++++++++++++++++++++++++++++++
>  arch/x86/platform/mrst/pmu.h    |  234 +++++++++++
>  4 files changed, 1058 insertions(+), 0 deletions(-)
>  create mode 100644 arch/x86/platform/mrst/pmu.c
>  create mode 100644 arch/x86/platform/mrst/pmu.h
> 

Acked-by: H. Peter Anvin <hpa@...ux.intel.com>

	-hpa

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