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Message-ID: <alpine.DEB.2.00.1108051831090.13276@router.home>
Date:	Fri, 5 Aug 2011 18:32:49 -0500 (CDT)
From:	Christoph Lameter <cl@...ux.com>
To:	"H. Peter Anvin" <hpa@...ux.intel.com>
cc:	"H. Peter Anvin" <hpa@...or.com>, Ingo Molnar <mingo@...e.hu>,
	linux-kernel@...r.kernel.org, Andi Kleen <ak@...ux.intel.com>
Subject: Re: [x86] Fix prefetch instruction

On Fri, 5 Aug 2011, H. Peter Anvin wrote:

> On 08/05/2011 02:10 PM, Christoph Lameter wrote:
> >>
> >> Have you done any performance analysis on this versus the null case?  I
> >> know there are some workloads where it helps, but if it hurts as many as
> >> it helps...
> >
> > No I have not. prefetch IMHO means that the cacheline is fetched early so
> > that the cacheline is fully available like any other to the code.
> > prefetchnta does fetch the cacheline too but its not treated like the other cacheline but
> > preferably thrown out again. Its a "streamfetch" designed for apps that
> > scan over large amounts of memory and want to avoid cache pollution.
> >
> > This is surprising to the end user as far as I can tell.
> >
>
> Right.  However, Linus has brought up the hypothesis that prefetch might
> actually be a net loss on x86, because current x86 processors are
> generally doing a good job with prefetching in hardware.  Directed
> prefetches can thus be a net minus.

This kinid of prefetch is a minus because the cache is evicted early. It
was prefetched with a special hint so its likely very important. That does
not seem to be very consistent and may cause regressions. Changing it to a
full prefetch would make the important cacheline stay longer in the cache.


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