linux-kernel - Re: [PATCH 1/4] perf: Add memory load/store events generic code

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Message-ID: <1312804650.10488.20.camel@twins>
Date:	Mon, 08 Aug 2011 13:57:30 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Anton Blanchard <anton@...ba.org>
Cc:	Paul Mackerras <paulus@...ba.org>, Lin Ming <ming.m.lin@...el.com>,
	Ingo Molnar <mingo@...e.hu>, Andi Kleen <andi@...stfloor.org>,
	Stephane Eranian <eranian@...gle.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/4] perf: Add memory load/store events generic code

On Fri, 2011-07-08 at 17:18 +0200, Peter Zijlstra wrote:
> On Fri, 2011-07-08 at 17:18 +1000, Anton Blanchard wrote:
> > Hi Peter,
> > 
> > > The thing we're talking about is Intel PEBS Load Latency/Precise Store
> > > and AMD IBS where together with a mem op retired event (mem loads
> > > retired for Load-Latency, mem stores retired for Precise Store)
> > > provides an additional field describing where the load/store was
> > > sourced from.
> > > 
> > > Such additional data would require the addition of a
> > > PERF_SAMPLE_SOURCE field or similar, for some reason or other I was
> > > under the impression some of the PPC chips had something similar. But
> > > if not, it saves us having to worry about that.
> > 
> > It does sound a lot like our event vector, where we can have up to
> > 64 bits of information that goes with a sample. A lot of the fields
> > relate to loads and stores, but there are other fields (eg pipeline
> > information at the point the sample was taken).
> > 
> > So we could definitely use a field to capture this.
> 
> Happen to have a ref to some docs about that? We'd want to make sure our
> definition is wide enough to also work for ppc.

Anton, Paul, any word on this? I'd love to see the specs for that
power-pmu event vector thing.. It would be a terrible shame if we now
include an abstraction that somewhat matches your needs but not quite,
requiring us to either introduce another abi component later or.
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