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Message-ID: <1313792978.27592.2.camel@sbsiddha-desk.sc.intel.com>
Date: Fri, 19 Aug 2011 15:29:38 -0700
From: Suresh Siddha <suresh.b.siddha@...el.com>
To: Arun Thomas <arun.thomas@...il.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>,
"x86@...nel.org" <x86@...nel.org>,
Andre Przywara <andre.przywara@....com>,
"Yu, Fenghua" <fenghua.yu@...el.com>,
Christoph Lameter <cl@...ux.com>, Tejun Heo <tj@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86, cpu: Add cpufeature flag for PCIDs
On Fri, 2011-08-19 at 12:42 -0700, Arun Thomas wrote:
> This patch add a flag for Process-Context Identifiers (PCIDs) aka
> Address Space Identifiers (ASIDs) aka Tagged TLB support.
>
> Signed-off-by: Arun Thomas <arun.thomas@...il.com>
> ---
> arch/x86/include/asm/cpufeature.h | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index 4258aac..f24ed51 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -114,6 +114,7 @@
> #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
> #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
> #define X86_FEATURE_PDCM (4*32+15) /* Performance Capabilities */
> +#define X86_FEATURE_PCID (4*32+17) /* Process Context Identifiers */
> #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */
> #define X86_FEATURE_XMM4_1 (4*32+19) /* "sse4_1" SSE-4.1 */
> #define X86_FEATURE_XMM4_2 (4*32+20) /* "sse4_2" SSE-4.2 */
Acked-by: Suresh Siddha <suresh.b.siddha@...el.com>
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