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Message-ID: <CAKnu2MoEvc7KGH-Fu1FzRE1xFFvsSRVdG5Amg6FL-6PrWRw5yA@mail.gmail.com>
Date:	Tue, 23 Aug 2011 22:00:33 +0200
From:	Linus Walleij <linus.ml.walleij@...il.com>
To:	Stephen Warren <swarren@...dia.com>
Cc:	Russell King <linux@....linux.org.uk>,
	Arnd Bergmann <arnd@...db.de>,
	Erik Gilling <konkers@...roid.com>,
	Belisko Marek <marek.belisko@...il.com>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>,
	Sergei Shtylyov <sshtylyov@...sta.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Grant Likely <grant.likely@...retlab.ca>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
	Shawn Guo <shawn.guo@...escale.com>,
	Colin Cross <ccross@...roid.com>,
	Olof Johansson <olof@...om.net>,
	Jamie Iles <jamie@...ieiles.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [RFC PATCH v2 00/13] arm/tegra: Initialize GPIO & pinmux from DT

2011/8/23 Stephen Warren <swarren@...dia.com>:
> Linus Walleij wrote at Tuesday, August 23, 2011 6:51 AM:
>> Each GPIO chip may have it's respective pin controller as parent
                               ^^^^^
>> I guess, or they may simply be the same struct device * whatdoIknow.
>
> I'm not clear on why the GPIO and pinmux would have any kind of parent
> relationship. Perhaps that's how your HW is designed. In Tegra, GPIO
> and pinmux are completely separate HW blocks without much of a defined
> relationship.
>
> I can certainly see both being implemented by the same code if it makes
> sense to do so. On Tegra, I think I'd still lean towards keeping them
> as separate devices, since they have separate register spaces and are
> documented separately etc. However, I can certainly see that other HW
> might have both sets of functionality in one HW block.

Makes sense, for U300 I will probably also keep them separate
like this:

pinctrl.0 - deal with muxing
pinctrl.1 - deal with biasing, driving etc
gpio.0 - the GPIO driver using both of the above, no relationship

The only thing they have in common is some relation to the
global GPIO pin space. (When/if we get rid of that - something
better.)

Yours,
Linus Walleij
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