linux-kernel - Re: [PATCH 00/18] x86: Ticket lock + cmpxchg cleanup

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Message-ID: <CA+55aFw5T_rkH7195E=P_YO9sjvJbsG4j6n40=fXbdrJktAYjQ@mail.gmail.com>
Date:	Wed, 24 Aug 2011 16:09:31 -0700
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	"H. Peter Anvin" <hpa@...or.com>
Cc:	Jeremy Fitzhardinge <jeremy@...p.org>,
	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...e.hu>,
	"the arch/x86 maintainers" <x86@...nel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Nick Piggin <npiggin@...nel.dk>,
	Jeremy Fitzhardinge <jeremy.fitzhardinge@...rix.com>
Subject: Re: [PATCH 00/18] x86: Ticket lock + cmpxchg cleanup

On Wed, Aug 24, 2011 at 4:05 PM, H. Peter Anvin <hpa@...or.com> wrote:
>
> That's not guaranteed in any way to generate a locally atomic instruction.

No such guarantee is needed - we hold the lock (until the last store),
so as long as it doesn't do anything completely crazy, then the
"head++" will work.

However, the reason I disagree with it is that I don't think that it's
any prettier at all to have the two barriers than it is to just have
the asm.

I see no advantage of a three-line "pseudo-C" code with two magic
barriers over just doing it with the inline asm. The fact that the
inline asm also makes the OOSTORE case trivial is just gravy.

                     Linus
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