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Message-ID: <20110825151210.GC31331@huya.qualcomm.com>
Date: Thu, 25 Aug 2011 08:12:10 -0700
From: David Brown <davidb@...eaurora.org>
To: Linus Walleij <linus.walleij@...aro.org>, rvaswani@...eaurora.org,
gbean@...eaurora.org
Cc: Stephen Warren <swarren@...dia.com>,
Linus Walleij <linus.walleij@...ricsson.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Grant Likely <grant.likely@...retlab.ca>,
Lee Jones <lee.jones@...aro.org>,
Joe Perches <joe@...ches.com>,
Russell King <linux@....linux.org.uk>,
Linaro Dev <linaro-dev@...ts.linaro.org>,
ext Tony Lindgren <tony@...mide.com>,
David Brown <davidb@...eaurora.org>,
Sascha Hauer <kernel@...gutronix.de>
Subject: Re: [PATCH 1/4 v4] drivers: create a pin control subsystem
On Thu, Aug 25, 2011 at 12:12:59PM +0200, Linus Walleij wrote:
> mach-msm:
> ----------------
>
> Hard to tell how this works and what's available, support
> seems to be incomplete. Currently it seems to be wired
> to do either a dedicated function (like some UART pin)
> or GPIO, like each pin can be used for two specific
> things, and not phone-exchange type.
There are some pins on MSMs that can be connected to different hw
blocks, we just haven't gotten the support into the kernel yet.
There are some things where two devices share pins, and you have to
choose one or the other.
I believe there are also configurations where something such as the SD
controller can either be configured in 8-bit data mode, or in 4-bit
data mode, and those 4 pins connected to something else.
Much of the current pin configuration in our product kernel seems to
be about current and pull up/down configuration.
I've added Rohit Vaswani, and Greg Bean to this thread who should have
a bit better understanding of this.
David
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Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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