linux-kernel - [PATCH] x86, cpu: Add cpufeature flag for TSC-Deadline

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Message-Id: <1314532992-19495-1-git-send-email-arun.thomas@gmail.com>
Date:	Sun, 28 Aug 2011 14:03:12 +0200
From:	Arun Thomas <arun.thomas@...il.com>
To:	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
	Andre Przywara <andre.przywara@....com>,
	Fenghua Yu <fenghua.yu@...el.com>,
	Christoph Lameter <cl@...ux.com>, Tejun Heo <tj@...nel.org>,
	linux-kernel@...r.kernel.org
Cc:	Arun Thomas <arun.thomas@...il.com>
Subject: [PATCH] x86, cpu: Add cpufeature flag for TSC-Deadline

This patch adds a flag for TSC-Deadline mode, which allows software to
set the local APIC timer to one-shot interrupt at an absolute time
(i.e., a TSC deadline).

Signed-off-by: Arun Thomas <arun.thomas@...il.com>
---
 arch/x86/include/asm/cpufeature.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index f24ed51..f19e1e8 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -121,6 +121,7 @@
 #define X86_FEATURE_X2APIC	(4*32+21) /* x2APIC */
 #define X86_FEATURE_MOVBE	(4*32+22) /* MOVBE instruction */
 #define X86_FEATURE_POPCNT      (4*32+23) /* POPCNT instruction */
+#define X86_FEATURE_TSC_DEADLINE (4*32+24) /* APIC supports TSC deadline mode */
 #define X86_FEATURE_AES		(4*32+25) /* AES instructions */
 #define X86_FEATURE_XSAVE	(4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
 #define X86_FEATURE_OSXSAVE	(4*32+27) /* "" XSAVE enabled in the OS */
-- 
1.7.4.1

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