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Message-ID: <20110907175756.GH2906@opensource.wolfsonmicro.com>
Date: Wed, 7 Sep 2011 10:57:56 -0700
From: Mark Brown <broonie@...nsource.wolfsonmicro.com>
To: Jonathan Cameron <jic23@....ac.uk>
Cc: LKML <linux-kernel@...r.kernel.org>,
"Hennerich, Michael" <Michael.Hennerich@...log.com>,
"linux-iio@...r.kernel.org" <linux-iio@...r.kernel.org>
Subject: Re: Blockers on IIO usage of regmap.
On Wed, Sep 07, 2011 at 05:10:24PM +0100, Jonathan Cameron wrote:
Please fix your mailer to word wrap at less than 80 colums, they're
really quite hard to read as a result of this.
> CS -_______________________-
> TX Ada0...Ada7 Da0....Da7
> RX XXXXXXXXXXXXXXXXXXXXXXXXX
>
> Reads are 16 bit with either of the two 8 bit register addresses given the same value
>
> CS -______________________-_____________________-
> TX Ada0....Ada7 XXXXXXXX
> RX XXXXXXXXXXXXXXXXXXXXX Da0...Da7 Db0....Db7
> Can interpret Da0...Da7 and Db0....Db7 as single 16 bit register and consider this device
> to just have a weird write method and normal read. Might be easier. I'll define Ax<n> as
> 16 bit address for the burst read.
This is starting to seem pretty far off the reservation.
> Perhaps the burst mode thing is better handled by just providing a hook to allow data to be pushed
> into regmap (from 'magic' sources), but the weird write read combination looks to me like something
> that makes sense to have in regmap (be it as another bus variant).
Probably not as a bus, it sounds like a marshalling difference rather
than a bus - the buses should really only understand byte streams. I
don't have any bright ideas on how to deal with this, it's fairly far
away from the problem space I'm worried about.
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