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Message-ID: <20110915082252.GB30518@flint.arm.linux.org.uk>
Date: Thu, 15 Sep 2011 09:22:53 +0100
From: Russell King <rmk@....linux.org.uk>
To: Jassi Brar <jaswinder.singh@...aro.org>
Cc: dan.j.williams@...el.com, vkoul@...radead.org,
linux-kernel@...r.kernel.org, 21cnbao@...il.com
Subject: Re: [PATCHv2] DMAEngine: Define generic transfer request api
On Thu, Sep 15, 2011 at 01:16:29PM +0530, Jassi Brar wrote:
> +/**
> + * struct dmaxfer_template - Template to convey DMAC the transfer pattern
> + * and attributes.
> + * @src_start: Bus address of source for the first chunk.
> + * @dst_start: Bus address of destination for the first chunk.
> + * @src_inc: If the source address increments after reading from it.
> + * @dst_inc: If the destination address increments after writing to it.
> + * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
> + * Otherwise, source is read contiguously (icg ignored).
> + * Ignored if src_inc is false.
> + * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
> + * Otherwise, destination is filled contiguously (icg ignored).
> + * Ignored if dst_inc is false.
> + * @frm_irq: If the client expects DMAC driver to do callback after each frame.
> + * @numf: Number of frames in this template.
> + * @frame_size: Number of chunks in a frame i.e, size of sgl[].
> + * @sgl: Array of {chunk,icg} pairs that make up a frame.
> + */
> +struct dmaxfer_template {
> + dma_addr_t src_start;
> + dma_addr_t dst_start;
> + bool src_inc;
> + bool dst_inc;
> + bool src_sgl;
> + bool dst_sgl;
> + bool frm_irq;
I'll ask again. How does this deal with the XOR operation, where you have
two sources and one destination? Unless you sort that out, I don't see
how your idea of collapsing all the prepare functions can possibly work.
--
Russell King
Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/
maintainer of:
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