| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1316423432-18333-1-git-send-email-shawn.guo@linaro.org> Date: Mon, 19 Sep 2011 17:10:32 +0800 From: Shawn Guo <shawn.guo@...aro.org> To: Grant Likely <grant.likely@...retlab.ca> Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, patches@...aro.org, Shawn Guo <shawn.guo@...aro.org> Subject: [PATCH] gpio/mxc: make it work with imx6q The imx6q is a Cortex-A9 Quad Core SoC, which has GIC as the primary interrupt controller. GIC requires gpio irq handler to signal EOI, otherwise system will hang whenever there is a gpio irq triggered. Signed-off-by: Shawn Guo <shawn.guo@...aro.org> --- drivers/gpio/gpio-mxc.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 4340aca..00b4c9c 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -233,6 +233,9 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) u32 irq_stat; struct mxc_gpio_port *port = irq_get_handler_data(irq); + if (desc->irq_data.chip->irq_eoi) + desc->irq_data.chip->irq_eoi(&desc->irq_data); + irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR); mxc_gpio_irq_handler(port, irq_stat); -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists