linux-kernel - Re: [PATCH 5/5] ARM: gic: add OF based initialization

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Message-ID: <20110920041804.GD30517@ponder.secretlab.ca>
Date:	Mon, 19 Sep 2011 22:18:04 -0600
From:	Grant Likely <grant.likely@...retlab.ca>
To:	Rob Herring <robherring2@...il.com>
Cc:	"Cousson, Benoit" <b-cousson@...com>,
	Thomas Abraham <thomas.abraham@...aro.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"marc.zyngier@....com" <marc.zyngier@....com>,
	"jamie@...ieiles.com" <jamie@...ieiles.com>,
	"shawn.guo@...aro.org" <shawn.guo@...aro.org>,
	Rob Herring <rob.herring@...xeda.com>
Subject: Re: [PATCH 5/5] ARM: gic: add OF based initialization

On Mon, Sep 19, 2011 at 04:53:39PM -0500, Rob Herring wrote:
> On 09/19/2011 04:14 PM, Grant Likely wrote:
> > (Alternately, if there is no need for a CPU mask because PPI
> > interrupts will never be wired to more than one CPU, then it would be
> > better to encode the CPU number into the second cell with the SPI
> > number).
> You meant PPI number, right?                                    ^^^

Yes, I meant PPI number.  I keep transposing the two; I don't know why.

> The common case at least on the A9 is a PPI is routed to all cores. QC
> is different though. This was discussed previously. Basically, anything
> is possible here, so the mask is needed for sure.

Okay.

g.
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