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Message-ID: <2071463.ueDZJJtM1L@wuerfel>
Date: Tue, 27 Sep 2011 20:27:28 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Håvard Skinnemoen <hskinnemoen@...il.com>
Cc: Arvid Brodin <arvid.brodin@...a.com>, linux-kernel@...r.kernel.org,
linux-embedded@...r.kernel.org,
Hans-Christian Egtvedt <egtvedt@...fundet.no>
Subject: Re: dma_unmap_single() lacking cache sync on some archs?
On Tuesday 27 September 2011 09:55:02 Håvard Skinnemoen wrote:
>
> On Tue, Sep 27, 2011 at 5:13 AM, Arvid Brodin <arvid.brodin@...a.com> wrote:
> > [Resending with CC to affected parties]
> >
> > Hi,
> >
> > I would expect cache synchronization for DMA_TO_DEVICE and DMA_BIDIRECTIONAL
> > when dma_map_single() is called, and for DMA_FROM_DEVICE and DMA_BIDIRECTIONAL
> > when dma_unmap_single() is called.
> >
> > However, on some architechtures (at least avr32, blackfin, ...), cache
> > synchronization only happens when dma_map_single() is called (and then
> > irrespective of DMA direction). dma_unmap_single() is a no-op for these archs.
> >
> > See e.g. http://lxr.linux.no/#linux+v3.0.4/arch/avr32/include/asm/dma-mapping.h#L117
> >
> > Isn't this a bug?
>
> I don't think so. What do other architectures do?
>
> We always need to sync before the transfer because if there is dirty
> data in the cache, it might get written to RAM during the transfer,
> which would be bad. Then, since the relevant cache lines are already
> clean and invalid, and the CPU is not allowed to access the buffer
> during the transfer, there's no need to sync again when the transfer
> is complete.
On some architectures, e.g. ARMv6 and higher, a speculative prefetch might
cause cache lines to be read again while an inbound DMA is on its way.
On those architectures you need to discard cache lines before reading from
the buffer. In fact also for DMA_FROM_DEVICE you need to flush or invalidate
the cache for the buffer before the transfer and invalidate the cache again
after the transfer.
Most architectures however do not require this.
Arnd
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