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Message-Id: <201109281611.27903.arnd@arndb.de>
Date: Wed, 28 Sep 2011 16:11:27 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Mark Salter <msalter@...hat.com>
Cc: linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org
Subject: Re: [PATCH v3 23/24] C6X: DSCR - Device State Configuration Registers
On Tuesday 27 September 2011, Mark Salter wrote:
>
> All SoCs provide an area of device configuration registers called the DSCR. The
> location of specific registers as well as their use varies considerably from
> implementation to implementation. Rather than having to rely on additional
> SoC-specific DSCR code for each new supported SoC, this code generalize things
> as much as possible using device tree properties. Initialization must take
> place early on (setup_arch time) in case the event timer device needs to be
> enable via the DSCR.
>
> Signed-off-by: Mark Salter <msalter@...hat.com>
Acked-by: Arnd Bergmann <arnd@...db.de>
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