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Message-Id: <20110928220130.639155715@clark.kroah.org>
Date: Wed, 28 Sep 2011 15:00:15 -0700
From: Greg KH <gregkh@...e.de>
To: linux-kernel@...r.kernel.org, stable@...nel.org
Cc: stable-review@...nel.org, torvalds@...ux-foundation.org,
akpm@...ux-foundation.org, alan@...rguk.ukuu.org.uk,
Dave Airlie <airlied@...hat.com>
Subject: [051/244] drm/radeon/kms: set a default max_pixel_clock
3.0-stable review patch. If anyone has any objections, please let us know.
------------------
From: Dave Airlie <airlied@...hat.com>
commit 9adceaa5b3d2480e2252c4a7f9c4bd7d66b8c4a2 upstream.
On some Power rv100 cards, we have no ATY OF table, but we have
no combios table either, and hence we refuse all modes on VGA-0
since we end up with a 0 max pixel clock.
Signed-off-by: Dave Airlie <airlied@...hat.com>
Reviewed-by: Alex Deucher <alexdeucher@...il.com>
Reviewed-by: Jerome Glisse <jglisse@...hat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...e.de>
---
drivers/gpu/drm/radeon/radeon_clocks.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -219,6 +219,9 @@ void radeon_get_clock_info(struct drm_de
} else {
DRM_INFO("Using generic clock info\n");
+ /* may need to be per card */
+ rdev->clock.max_pixel_clock = 35000;
+
if (rdev->flags & RADEON_IS_IGP) {
p1pll->reference_freq = 1432;
p2pll->reference_freq = 1432;
--
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