linux-kernel - Re: Workaround for Intel MPS errata

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Message-ID: <CAMaF-rM4Lm6zqLm7XWT570Xizcqet36WFbf5HNf09wKyHiLKag@mail.gmail.com>
Date:	Fri, 30 Sep 2011 10:39:34 -0500
From:	Jon Mason <mason@...i.com>
To:	Rolf Eike Beer <eike-kernel@...tec.de>
Cc:	Avi Kivity <avi@...hat.com>, Sven Schnelle <svens@...ckframe.org>,
	Simon Kirby <sim@...tway.ca>,
	Eric Dumazet <eric.dumazet@...il.com>,
	Niels Ole Salscheider <niels_ole@...scheider-online.de>,
	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	Ben Hutchings <bhutchings@...arflare.com>
Subject: Re: Workaround for Intel MPS errata

On Fri, Sep 30, 2011 at 2:03 AM, Rolf Eike Beer <eike-kernel@...tec.de> wrote:
>> Hey Avi,
>> Can you try this patch?  It should resolve the issue you are seeing.
>>
>> Thanks,
>> Jon
>>
>>     PCI: Workaround for Intel MPS errata
>>
>>     Intel 5000 and 5100 series memory controllers have a known issue if
>> read
>>     completion coalescing is enabled (the default setting) and the PCI-E
>>     Maximum Payload Size is set to 256B.  To work around this issue,
>> disable
>>     read completion coalescing if the MPS is 256B.
>>
>>     http://www.intel.com/content/dam/doc/specification-update/5000-chipset-memory-controller-hub-specification-update.pdf
>>     http://www.intel.com/content/dam/doc/specification-update/5100-memory-controller-hub-chipset-specification-update.pdf
>>
>>     Reported-by: Avi Kivity <avi@...hat.com>
>>     Signed-off-by: Jon Mason <mason@...i.com>
>>
>> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
>> index a919db2..13c733a 100644
>> --- a/drivers/pci/probe.c
>> +++ b/drivers/pci/probe.c
>> @@ -1361,6 +1361,80 @@ static int pcie_find_smpss(struct pci_dev *dev,
>> void *data)
>>       return 0;
>>  }
>>
>> +static void pcie_errata_check(int mps)
>> +{
>
> While this whole function is about Intel 5x00 devices the name of it is
> very generic (and in a very generic file). Maybe this can be changed, e.g.

I made it generic in naming because I'm betting there are other chips
out there that don't play nice with others.

> "fixup:" renamed to "fixup_intel_5x00:". Also I wonder if that shouldn't
> be a nop when CONFIG_PCI_QUIRKS is not set.

It probably should be a no-op for non-x86 too, as I doubt many other
arches use Intel memory controllers (maybe IA64).

Thanks,
Jon

>
> Eike
>
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