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Message-ID: <20111001093558.GA2807@phenom.ffwll.local>
Date: Sat, 1 Oct 2011 11:35:58 +0200
From: Daniel Vetter <daniel@...ll.ch>
To: Keith Packard <keithp@...thp.com>
Cc: Daniel Vetter <daniel@...ll.ch>, Dave Airlie <airlied@...hat.com>,
intel-gfx@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 06/21] drm/i915: Unlock PCH_PP_CONTROL always
On Fri, Sep 30, 2011 at 04:14:40PM -0700, Keith Packard wrote:
> On Fri, 30 Sep 2011 19:09:46 +0200, Daniel Vetter <daniel@...ll.ch> wrote:
>
> > grep shows that we also write to PCH_PP_CONTROL in intel_lvds.c in the
> > dpms functions - any reasons these two writes are left out?
>
> Upon a bit of review:
>
> The bspec makes it clear that this write protect key only needs to
> be written for eDP on DPA -- it's a work-around for a bug where panel
> power sequencing wouldn't work right.
>
> The LVDS code does disable write protect in the _init function, which
> seems global enough, but misses the resume case. We shouldn't ever
> need to set this field though; it write protects registers only
> when the panel is running. We could presumably remove the
> write protect disable entirely in the LVDS code.
>
> So, I think the patch as written is correct.
Convinced.
Reviewed-by: Daniel Vetter <daniel.vetter@...ll.ch>
--
Daniel Vetter
Mail: daniel@...ll.ch
Mobile: +41 (0)79 365 57 48
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