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Message-ID: <4E8D5206.4080608@dsn.lapis-semi.com>
Date:	Thu, 06 Oct 2011 16:00:22 +0900
From:	Tomoya MORINAGA <tomoya-linux@....lapis-semi.com>
To:	Tomoya MORINAGA <tomoya-linux@....lapis-semi.com>
CC:	Jean Delvare <khali@...ux-fr.org>, Ben Dooks <ben-linux@...ff.org>,
	Wolfram Sang <w.sang@...gutronix.de>,
	Qi Wang <qi.wang@...el.com>,
	Linus Walleij <linus.walleij@...ricsson.com>,
	linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
	yong.y.wang@...el.com, joel.clark@...el.com, kok.howg.ewe@...el.com
Subject: Re: [PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing

(2011/10/06 15:56), Tomoya MORINAGA wrote:

Previous [PATCH 3/7] is duplicated like below.
  [PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing
  [PATCH 3/7 v1] i2c-eg20t: Fix 10bit access issue

Please ignore "[PATCH 3/7 v3] i2c-eg20t: delete 10bit access processing"
Sorry for the in inconvenience.

-- 
tomoya
ROHM Co., Ltd.

> From: Tomoya MORINAGA<tomoya-linux@....okisemi.com>
> 
> Linux I2C core doesn't support 10bit access formally.
> Additionally, we can't test with 10bit mode.
> This patch deletes the 10bit access processing.
> 
> Signed-off-by: Tomoya MORINAGA<tomoya-linux@....lapis-semi.com>
> ---
>   drivers/i2c/busses/i2c-eg20t.c |    3 +--
>   1 files changed, 1 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
> index c5b9924..aa1705e 100644
> --- a/drivers/i2c/busses/i2c-eg20t.c
> +++ b/drivers/i2c/busses/i2c-eg20t.c
> @@ -410,7 +410,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
>   	}
> 
>   	if (msgs->flags&  I2C_M_TEN) {
> -		addr_2_msb = ((addr&  I2C_MSB_2B_MSK)>>  7);
> +		addr_2_msb = ((addr&  I2C_MSB_2B_MSK)>>  7)&  0x06;
>   		iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
>   		if (first)
>   			pch_i2c_start(adap);
> @@ -515,7 +515,6 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
>   	if (msgs->flags&  I2C_M_TEN) {
>   		addr_2_msb = (((addr&  I2C_MSB_2B_MSK)>>  7) | (I2C_RD));
>   		iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
> -
>   	} else {
>   		/* 7 address bits + R/W bit */
>   		addr = (((addr)<<  1) | (I2C_RD));

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