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Message-ID: <CAF+7xWkC5=9etjwde-nLegAEFd4AyzJcXyGUZyp9FWJjaE-fRA@mail.gmail.com>
Date:	Fri, 7 Oct 2011 21:10:21 +0800
From:	Axel Lin <axel.lin@...il.com>
To:	Mark Brown <broonie@...nsource.wolfsonmicro.com>
Cc:	linux-kernel@...r.kernel.org, Liam Girdwood <lrg@...com>,
	alsa-devel@...a-project.org
Subject: Re: [PATCH 01/11 RESEND] ASoC: wm8510: Convert to snd_soc_write

2011/10/7 Mark Brown <broonie@...nsource.wolfsonmicro.com>:
> On Fri, Oct 07, 2011 at 10:40:20AM +0800, Axel Lin wrote:
>
>> +static void wm8510_sync_cache(struct snd_soc_codec *codec)
>> +{
>> +     short i;
>> +     u16 *cache;
>> +
>> +     if (!codec->cache_sync)
>> +             return;
>> +     codec->cache_only = 0;
>> +     codec->cache_bypass = 1;
>> +     /* restore cache */
>> +     cache = codec->reg_cache;
>> +     for (i = 0; i < codec->driver->reg_cache_size; i++) {
>> +             if (i == WM8510_RESET || cache[i] == wm8510_reg[i])
>> +                     continue;
>> +             snd_soc_write(codec, i, cache[i]);
>> +     }
>> +     codec->cache_bypass = 0;
>> +     codec->cache_sync = 0;
>
> The usual trick for avoiding this is to provide a register default value
> for the reset register and then write that value when the chip is reset.
> This then means that the write to the reset register is suppressed by
> the cache restore code when it skips writes of default registers.
>
Nice trick. Then we can use snd_soc_cache_sync() to replace the
customized xxxx_sync_cache() calls.

I'll send a v3 soon.

> Thanks for doing this work.
And thanks for your valuable review.

Regards,
Axel
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