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Message-Id: <20111011165710.136001599@pistachio.kroah.org>
Date: Tue, 11 Oct 2011 10:55:22 -0600
From: Greg KH <gregkh@...e.de>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: stable-review@...nel.org, torvalds@...ux-foundation.org,
akpm@...ux-foundation.org, alan@...rguk.ukuu.org.uk,
Takashi Iwai <tiwai@...e.de>,
Eric Piel <eric.piel@...mplin-utc.net>,
Samu Onkalo <samu.p.onkalo@...ia.com>,
Andrew Morton <akpm@...gle.com>
Subject: [12/38] lis3: fix regression of HP DriveGuard with 8bit chip
3.0-stable review patch. If anyone has any objections, please let us know.
------------------
From: Takashi Iwai <tiwai@...e.de>
commit 05faadcf59507e8eea57ffbeea9cbb14c9a2ab3d upstream.
Commit 2a7fade7e03 ("hwmon: lis3: Power on corrections") caused a
regression on HP laptops with 8bit chip. Writing CTRL2_BOOT_8B bit seems
clearing the BIOS setup, and no proper interrupt for DriveGuard will be
triggered any more.
Since the init code there is basically only for embedded devices, put a
pdata check so that the problematic initialization will be skipped for
hp_accel stuff.
Signed-off-by: Takashi Iwai <tiwai@...e.de>
Cc: Eric Piel <eric.piel@...mplin-utc.net>
Cc: Samu Onkalo <samu.p.onkalo@...ia.com>
Signed-off-by: Andrew Morton <akpm@...gle.com>
Signed-off-by: Linus Torvalds <torvalds@...ux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@...e.de>
---
drivers/misc/lis3lv02d/lis3lv02d.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
--- a/drivers/misc/lis3lv02d/lis3lv02d.c
+++ b/drivers/misc/lis3lv02d/lis3lv02d.c
@@ -375,12 +375,14 @@ void lis3lv02d_poweron(struct lis3lv02d
* both have been read. So the value read will always be correct.
* Set BOOT bit to refresh factory tuning values.
*/
- lis3->read(lis3, CTRL_REG2, ®);
- if (lis3->whoami == WAI_12B)
- reg |= CTRL2_BDU | CTRL2_BOOT;
- else
- reg |= CTRL2_BOOT_8B;
- lis3->write(lis3, CTRL_REG2, reg);
+ if (lis3->pdata) {
+ lis3->read(lis3, CTRL_REG2, ®);
+ if (lis3->whoami == WAI_12B)
+ reg |= CTRL2_BDU | CTRL2_BOOT;
+ else
+ reg |= CTRL2_BOOT_8B;
+ lis3->write(lis3, CTRL_REG2, reg);
+ }
/* LIS3 power on delay is quite long */
msleep(lis3->pwron_delay / lis3lv02d_get_odr());
--
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