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Message-ID: <20111019171351.GA29064@gere.osrc.amd.com>
Date:	Wed, 19 Oct 2011 19:13:51 +0200
From:	Borislav Petkov <bp@...64.org>
To:	"Luck, Tony" <tony.luck@...el.com>
Cc:	EDAC devel <linux-edac@...r.kernel.org>,
	Ingo Molnar <mingo@...e.hu>, X86-ML <x86@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [RFC -v2] x86 RAS: Reorganize functionality

On Wed, Oct 19, 2011 at 10:08:25AM -0700, Luck, Tony wrote:
> > and what I actually would like to see is something like
> 
> [ ] Reliability, Availability, Serviceability
> [ ]  Machine Check Architecture
> [ ]	Intel-specific features
> 	[ ] CMCI / overheating reporting
> 	[ ] MCE decoding
> 	[ ] MCE injection
> [ ]	AMD-specific features
> 	[ ] Error thresholding
> 	[ ] MCE decoding
> 	[ ] MCE injection
> [ ] ...
> 
> Where does EINJ and other APEI bits fit into this ... it isn't Intel
> specific (Is it? Do AMD BIOS writers include it??).

I'll have to check on that but...

> It would be nice for it to eventually move in with the other "RAS"
> bit, rather than being hidden under a couple of levels of ACPI menus.

... absolutely, that's what the "[ ] ..." was supposed to mean - other
RAS features which should go there eventually.

Thanks.

-- 
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Boris.

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