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Message-ID: <1319131900.5622.25.camel@sbsiddha-desk.sc.intel.com>
Date: Thu, 20 Oct 2011 10:31:40 -0700
From: Suresh Siddha <suresh.b.siddha@...el.com>
To: Venki Pallipadi <venki@...gle.com>
Cc: Andi Kleen <andi@...stfloor.org>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Ingo Molnar <mingo@...e.hu>,
Peter Zijlstra <peterz@...radead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [Patch] Idle balancer: cache align nohz structure to improve
idle load balancing scalability
On Thu, 2011-10-20 at 05:26 -0700, Venki Pallipadi wrote:
> On Wed, Oct 19, 2011 at 9:24 PM, Andi Kleen <andi@...stfloor.org> wrote:
> > Tim Chen <tim.c.chen@...ux.intel.com> writes:
> >> */
> >> static struct {
> >> - atomic_t load_balancer;
> >> - atomic_t first_pick_cpu;
> >> - atomic_t second_pick_cpu;
> >> - cpumask_var_t idle_cpus_mask;
> >> + atomic_t load_balancer ____cacheline_aligned;
> >> + atomic_t first_pick_cpu ____cacheline_aligned;
> >> + atomic_t second_pick_cpu ____cacheline_aligned;
> >> + cpumask_var_t idle_cpus_mask ____cacheline_aligned;
> >
> > On large configs idle_cpu_masks may be allocated. May need
> > more changes to tell the allocator to cache align/pad too?
> >
>
> An alternate approach is to split this struct per node/socket and do
> the nohz idle balancing logic at that level. That should be more
> scalable in terms of nohz balancing (ensure one CPU wont be doing nohz
> balancing for huge number of idle CPUs). I had looked at that approach
> couple of years earlier and couldn't measure that much of a gain. May
> be it is time to revisit that with increased core count.
I am actually looking at it. This is a quick fix for the meantime.
Even with this cacheline aligned, the first_pick_cpu and second_pick_cpu
cacheline bouncing is still causing ~8% more performance impact on this
synthetic lat_ctx heavy workload. For this experiment to measure the
potential scope we have here, We left the cacheline bouncing associated
with the nohz.idle_cpus_mask update in place.
thanks,
suresh
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