[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <4EB1A9A7.8070900@redhat.com>
Date: Wed, 02 Nov 2011 16:35:51 -0400
From: Adam Jackson <ajax@...hat.com>
To: Keith Packard <keithp@...thp.com>
CC: Jesse Barnes <jbarnes@...tuousgeek.org>,
intel-gfx@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 3/7] drm/i915: Treat PCH eDP like DP in most
places
On 11/2/11 4:05 PM, Keith Packard wrote:
> On Wed, 02 Nov 2011 15:36:20 -0400, Adam Jackson<ajax@...hat.com> wrote:
>
>> The VBT is going to be crap.
>
> The only question then is what to do with hardware that doesn't have the
> DPCD value -- that's "new" in revision 0x11, after all.
It is? The DP 1.1a text for lane count is "For Rev.1.1, only the
following three values are supported. All other values are reserved." I
don't think that implies anything about what it meant in 1.0. It does
say that bits 7:5 of that register are reserved in 1.0 though; since it
doesn't have any versioning on bits 4:0 I'd think that means they're
interpreted the same in 1.0 as in 1.1.
Unless you have a copy of the 1.0 spec?
Again, not that it probably matters much. I think the installed base of
DP 1.0 sinks is zero, I've literally never seen one.
> How about this:
>
> commit 34ebe02cc78f20ae6b7865c5087c3b5ac7810185
> Author: Keith Packard<keithp@...thp.com>
> Date: Wed Nov 2 13:03:47 2011 -0700
>
> drm/i915: Use DPCD value for max DP lanes where possible
>
> Fall back to the VBT value for eDP monitors only when DPCD is missing
> the value.
>
> Signed-off-by: Keith Packard<keithp@...thp.com>
Reviewed-by: Adam Jackson <ajax@...hat.com>
- ajax
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists