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Message-Id: <1320606840-21132-10-git-send-email-daniel.vetter@ffwll.ch>
Date:	Sun,  6 Nov 2011 20:13:56 +0100
From:	Daniel Vetter <daniel.vetter@...ll.ch>
To:	intel-gfx <intel-gfx@...ts.freedesktop.org>
Cc:	linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
	Daniel Vetter <daniel.vetter@...ll.ch>
Subject: [PATCH 09/13] drm/i915: don't use gtt_pwrite on LLC cached objects

~120 µs instead fo ~210 µs to write 1mb on my snb. I like this.

Signed-off-by: Daniel Vetter <daniel.vetter@...ll.ch>
---
 drivers/gpu/drm/i915/i915_gem.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0048917..8fd175c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -842,6 +842,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
 		ret = i915_gem_phys_pwrite(dev, obj, args, file);
 		goto out;
 	} else if (obj->gtt_space &&
+		   obj->cache_level == I915_CACHE_NONE &&
 		   obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
 		ret = i915_gem_object_pin(obj, 0, true);
 		if (ret)
-- 
1.7.6.4

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