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Date:	Mon, 07 Nov 2011 13:10:33 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	linux-kernel@...r.kernel.org, robert.richter@....com,
	mingo@...e.hu, ming.m.lin@...el.com, ak@...ux.intel.com
Subject: Re: [PATCH] perf_events: fix and improve x86 event scheduling

On Mon, 2011-11-07 at 12:01 +0100, Stephane Eranian wrote:
> +                       /*
> +                        * scan all possible counters for this event
> +                        * but use the one with the smallest counter weight,
> +                        * i.e., give a chance to other less constrained events
> +                        */
>                         for_each_set_bit(j, c->idxmsk, X86_PMC_IDX_MAX) {
>  
> +                               if (test_bit(j, used_mask))
> +                                       continue;
> +
> +                               if (wcnt[j] < min_wcnt) {
> +                                       min_wcnt = wcnt[j];
> +                                       wcnt_idx = j;
> +                               }
> +                       } 

The problem with this is that it will typically hit the worst case for
Intel fixed-purpose events since the fixed purpose counters have the
highest counter index and their constraint masks are the heaviest in the
system ensuring we hit the max loop count on the top loop.

Then again, with Robert's approach we have to mark all fixed purpose
thingies as redo and we might hit some weird cases there as well, can't
seem to get me brain straight on that case though.


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