linux-kernel - Re: [PATCHv2 6/9] perf: expose perf capability to other modules.

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Date:	Tue, 8 Nov 2011 14:49:06 +0200
From:	Gleb Natapov <gleb@...hat.com>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	kvm@...r.kernel.org, avi@...hat.com, mtosatti@...hat.com,
	linux-kernel@...r.kernel.org, mingo@...e.hu,
	acme@...stprotocols.net
Subject: Re: [PATCHv2 6/9] perf: expose perf capability to other modules.

On Mon, Nov 07, 2011 at 03:07:50PM +0100, Peter Zijlstra wrote:
> On Thu, 2011-11-03 at 14:33 +0200, Gleb Natapov wrote:
> > @@ -1580,6 +1580,8 @@ __init int intel_pmu_init(void)
> >         x86_pmu.num_counters            = eax.split.num_counters;
> >         x86_pmu.cntval_bits             = eax.split.bit_width;
> >         x86_pmu.cntval_mask             = (1ULL << eax.split.bit_width) - 1;
> > +       x86_pmu.events_mask             = ebx;
> > +       x86_pmu.events_mask_len         = eax.split.mask_length;
> >  
> >         /*
> >          * Quirk: v2 perfmon does not report fixed-purpose events, so
> > @@ -1651,6 +1653,7 @@ __init int intel_pmu_init(void)
> >                          * architectural event which is often completely bogus:
> >                          */
> >                         intel_perfmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0x7f89;
> > +                       x86_pmu.events_mask &= ~0x40;
> >  
> >                         pr_cont("erratum AAJ80 worked around, ");
> >                 } 
> 
> It might make sense to introduce cpuid10_ebx or so, also I think the
cpuid10_ebx will have only one field though (event_mask).

> At the very least add a full ebx iteration to disable unsupported events
> in the intel-v1 case.
I do not understand what do you mean here, cpuid10_ebx was introduced by
intel v1 architectural PMU so it should already contain correct information.

--
			Gleb.
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