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Message-ID: <20111109093147.GZ16886@pengutronix.de>
Date: Wed, 9 Nov 2011 10:31:47 +0100
From: Sascha Hauer <s.hauer@...gutronix.de>
To: Grant Likely <grant.likely@...retlab.ca>
Cc: devicetree-discuss@...ts.ozlabs.org,
linux-arm-kernel@...ts.infradead.org,
Sascha Hauer <kernel@...gutronix.de>,
Rob Herring <rob.herring@...xeda.com>,
linux-kernel@...r.kernel.org
Subject: Re: [RFC 8/8] dt/arm: versatile add clock parsing
On Tue, Nov 08, 2011 at 06:19:43PM -0700, Grant Likely wrote:
> Signed-off-by: Grant Likely <grant.likely@...retlab.ca>
> ---
> arch/arm/boot/dts/versatile-ab.dts | 37 ++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/versatile-pb.dts | 2 +
> arch/arm/mach-versatile/core.c | 37 +------------------------------
> arch/arm/mach-versatile/versatile_dt.c | 33 ++++++++++++++++++++++++++++
> 4 files changed, 74 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
> index 0b32925..cb8a49e 100644
> --- a/arch/arm/boot/dts/versatile-ab.dts
> +++ b/arch/arm/boot/dts/versatile-ab.dts
> @@ -19,6 +19,35 @@
> reg = <0x0 0x08000000>;
> };
>
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ref24_clk: clock0 {
> + compatible = "fixed-clock";
> + #clock-cells = <1>;
> + clock-frequency = <24000000>;
> + clock-output-names = "ref";
> + };
> +
> + sp804_clk: clock1 {
> + compatible = "fixed-clock";
> + #clock-cells = <1>;
> + clock-frequency = <1000000>;
> + clock-output-names = "ref";
> + };
> +
> + osc4_clk: clock3 {
> + compatible = "ics,icst307";
> + #clock-cells = <1>;
> + ref = <24000>;
> + vco-max = <200000>;
> + vd-range = <12 519>;
> + rd-range = <3 129>;
> + clock-output-names = "osc4";
> + };
The registers needed to access osc4 are missing here. This probably
means that osc4 cannot be specified in the clocks node but has to
be sorted into the bus structure of the SoC.
> +
> static void __init versatile_dt_init(void)
> {
> + struct device_node *node;
> + struct clk *clk;
> + int rc;
> +
> + for_each_compatible_node(node, NULL, "fixed-clock") {
> + u32 rate;
> + if (of_property_read_u32(node, "clock-frequency", &rate))
> + continue;
> +
> + clk = kzalloc(sizeof(*clk), GFP_KERNEL);
> + if (!clk)
> + panic("out of memory\n");
> + clk->rate = rate;
> +
> + rc = of_clk_add_provider(node, versatile_dt_clk_get, clk);
> + if (rc) {
> + kfree(clk);
> + pr_err("error adding fixed clk %s\n", node->name);
> + }
> + }
> +
Well this is obviously just a quick hack to get something working. I
just want to add the note here that Mikes current patches require to
register the clock tree top-down. This may be hard to archieve as the
clocks are somewhere in the devicetree (sorted by bus topology and not
by clock topology). So we either need more thinking in the clock
framework to overcome the top-down registration or more thinking here
in the registration of the clocks.
Sascha
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