linux-kernel - Re: [PATCH] intel-iommu: Default to non-coherent for domains unattached to iommus

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Message-ID: <1321059789.2006.31.camel@shinybook.infradead.org>
Date:	Sat, 12 Nov 2011 01:03:09 +0000
From:	David Woodhouse <dwmw2@...radead.org>
To:	Chris Wright <chrisw@...s-sol.org>
Cc:	Alex Williamson <alex.williamson@...hat.com>,
	linux-pci@...r.kernel.org, iommu@...ts.linux-foundation.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] intel-iommu: Default to non-coherent for domains
 unattached to iommus

On Fri, 2011-11-11 at 16:58 -0800, Chris Wright wrote:
> * David Woodhouse (dwmw2@...radead.org) wrote:
> > On Fri, 2011-11-11 at 16:45 -0800, Chris Wright wrote:
> > > > So if you were to ditch the whole idea of a per-domain runtime update,
> > > > and instead calculate a global value for 'iommu_coherency' at boot time,
> > > > by iterating over for_each_active_iommu()¹, I think that would be a
> > > > better way to deal with the issue. And you *could* really call that a
> > > > 'fix'.
> > > > 
> > > > Make sense?
> > > 
> > > Ideally, yes.  Not sure we can practically do it though.  Would have to
> > > be sure we force incoherent access mode for the busted hw. 
> > 
> > Why's it not practical? You do the *same* loop we currently have in
> > domain_update_iommu_coherency(), except that you do it just *once*, over
> > all active IOMMUs, at boot time. And then you just use that result
> > forever more.
> 
> Yeah, you're right, that should be simple enough.  What about snoop
> control?  Same thing...should we expect it to be system wide?  Because
> that one's exported out to KVM and used.

Not sure. That might differ for the graphics IOMMU (large page support
certainly does). But I don't *think* the coherency does, does it?

> > So if *any* IOMMU in the system is non-coherent, you run them all that
> > way.
> 
> Minus the measureable slowdown for some devices that were behind coherent
> IOMMU (IIRC, the chipsets that had this issue were mobile anyway, so
> not as performance sensitive), *nod* .

Are there really machines where only *some* of the IOMMUs are coherent?
I didn't think there were, which would mean there's no real performance
penalty on the hardware that actually exists today.

-- 
dwmw2

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