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Message-ID: <d2b66ba1a6c2b34f7e0b82e31bc360684c734759.1321507421.git.viresh.kumar@st.com>
Date: Thu, 17 Nov 2011 11:02:24 +0530
From: Viresh Kumar <viresh.kumar@...com>
To: <rabin.vincent@...ricsson.com>, <linus.walleij@...ricsson.com>,
<srinidhi.kasagar@...ricsson.com>
Cc: <sameo@...ux.intel.com>, <linux-kernel@...r.kernel.org>,
<armando.visconti@...com>, <shiraz.hashim@...com>,
<vipin.kumar@...com>, <rajeev-dlh.kumar@...com>,
<deepak.sikri@...com>, <vipulkumar.samar@...com>,
<amit.virdi@...com>, <viresh.kumar@...com>,
<pratyush.anand@...com>, <bhupesh.sharma@...com>,
<viresh.linux@...il.com>, <bhavna.yadav@...com>,
<vincenzo.frascino@...com>, <mirko.gardi@...com>,
<grant.likely@...retlab.ca>
Subject: [PATCH V2 5/5] gpio/gpio-stmpe: ADD support for stmpe variant 801
STMPE801 is a GPIO expander. GPIO registers for 801 are slightly different from other
variants. This patch adds support for STMPE801 in stmpe gpio driver.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...com>
Signed-off-by: Pratyush Anand <pratyush.anand@...com>
Signed-off-by: Viresh Kumar <viresh.kumar@...com>
---
drivers/gpio/gpio-stmpe.c | 31 ++++++++++++++++++++++++++++---
1 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
index 4c980b5..000b019 100644
--- a/drivers/gpio/gpio-stmpe.c
+++ b/drivers/gpio/gpio-stmpe.c
@@ -65,7 +65,15 @@ static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
u8 reg = stmpe->regs[which] - (offset / 8);
u8 mask = 1 << (offset % 8);
- stmpe_reg_write(stmpe, reg, mask);
+ /*
+ * Some variants have single register for gpio set/clear functionality.
+ * For them we need to write 0 to clear and 1 to set.
+ */
+ if (!val && (stmpe->regs[STMPE_IDX_GPSR_LSB] ==
+ stmpe->regs[STMPE_IDX_GPCR_LSB]))
+ stmpe_set_bits(stmpe, reg, mask, ~mask);
+ else
+ stmpe_set_bits(stmpe, reg, mask, mask);
}
static int stmpe_gpio_direction_output(struct gpio_chip *chip,
@@ -125,10 +133,19 @@ static struct gpio_chip template_chip = {
static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type)
{
struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d);
+ struct stmpe *stmpe = stmpe_gpio->stmpe;
int offset = d->irq - stmpe_gpio->irq_base;
int regoffset = offset / 8;
int mask = 1 << (offset % 8);
+ /* STMPE801 doesn't have RE and FE registers */
+ if (stmpe->partnum == STMPE801) {
+ if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
+ return 0;
+ else
+ return -EINVAL;
+ }
+
if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
return -EINVAL;
@@ -165,6 +182,11 @@ static void stmpe_gpio_irq_sync_unlock(struct irq_data *d)
int i, j;
for (i = 0; i < CACHE_NR_REGS; i++) {
+ /* STMPE801 doesn't have RE and FE registers */
+ if ((stmpe->partnum == STMPE801) &&
+ (i != REG_IE))
+ continue;
+
for (j = 0; j < num_banks; j++) {
u8 old = stmpe_gpio->oldregs[i][j];
u8 new = stmpe_gpio->regs[i][j];
@@ -241,8 +263,11 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
}
stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
- stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB] + i,
- status[i]);
+
+ /* Edge detect register is not present on 801 */
+ if (stmpe->partnum != STMPE801)
+ stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB]
+ + i, status[i]);
}
return IRQ_HANDLED;
--
1.7.2.2
--
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