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Message-ID: <4EC5BE16.9080205@freescale.com>
Date: Fri, 18 Nov 2011 10:08:22 +0800
From: LiuShuo <b35362@...escale.com>
To: <dedekind1@...il.com>
CC: <dwmw2@...radead.org>, <Artem.Bityutskiy@...ia.com>,
<linux-mtd@...ts.infradead.org>, <linuxppc-dev@...ts.ozlabs.org>,
<akpm@...ux-foundation.org>, <linux-kernel@...r.kernel.org>,
<leoli@...escale.com>, <scottwood@...escale.com>,
Jerry Huang <Chang-Ming.Huang@...escale.com>,
Tang Yuantian <b29983@...escale.com>
Subject: Re: [PATCH 2/3] mtd/nand : set Nand flash page address to FBAR and
FPAR correctly
Ok and I want to add another patch before 3/3.
-LiuShuo
> On Tue, 2011-11-15 at 17:29 +0800, b35362@...escale.com wrote:
>> From: Liu Shuo<b35362@...escale.com>
>>
>> If we use the Nand flash chip whose number of pages in a block is greater
>> than 64(for large page), we must treat the low bit of FBAR as being the
>> high bit of the page address due to the limitation of FCM, it simply uses
>> the low 6-bits (for large page) of the combined block/page address as the
>> FPAR component, rather than considering the actual block size.
> Looks like this patch depends on the previous white-space clean-up patch
> - could you please refactor it (and 3/3 too) and resend?
Ok and I am going to add another new patch before 3/3.
-LiuShuo
> Artem.
>
>
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