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Date: Thu, 24 Nov 2011 07:49:03 +0000 From: Li Yang-R58472 <r58472@...escale.com> To: "dedekind1@...il.com" <dedekind1@...il.com>, Liu Shuo-B35362 <B35362@...escale.com> CC: "dwmw2@...radead.org" <dwmw2@...radead.org>, "Artem.Bityutskiy@...ia.com" <Artem.Bityutskiy@...ia.com>, Wood Scott-B07421 <B07421@...escale.com>, "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>, "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>, "akpm@...ux-foundation.org" <akpm@...ux-foundation.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: RE: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip > Subject: Re: [PATCH 3/3] mtd/nand : workaround for Freescale FCM to support > large-page Nand chip > > On Thu, 2011-11-24 at 08:41 +0800, b35362@...escale.com wrote: > > + /* > > + * Freescale FCM controller has a 2K size limitation of buffer > > + * RAM, so elbc_fcm_ctrl->buffer have to be used if writesize > > + * of chip is greater than 2048. > > + * We malloc a large enough buffer (maximum page size is > 16K). > > + */ > > + elbc_fcm_ctrl->buffer = kmalloc(1024 * 16 + 1024, > GFP_KERNEL); > > Are there NANDs with 16KiB page size? We are not sure, but are there possibility that chip with 16K page will appear? Or maybe we can add a MACRO for the maximum page size? - Leo
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