linux-kernel - Re: [RFC PATCH 4/6] ARM: Remove __ARCH_WANT_INTERRUPTS_ON

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Message-ID: <4ED6ED03.9080408@am.sony.com>
Date:	Wed, 30 Nov 2011 18:57:07 -0800
From:	Frank Rowand <frank.rowand@...sony.com>
To:	Catalin Marinas <catalin.marinas@....com>
CC:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...e.hu>,
	Peter Zijlstra <peterz@...radead.org>,
	Russell King <linux@....linux.org.uk>
Subject: Re: [RFC PATCH 4/6] ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on
 ASID-capable CPUs

On 11/29/11 04:22, Catalin Marinas wrote:
> Since the ASIDs must be unique to an mm across all the CPUs in a system,
> the __new_context() function needs to broadcast a context reset event to
> all the CPUs during ASID allocation if a roll-over occurred. Such IPIs
> cannot be issued with interrupts disabled and ARM had to define
> __ARCH_WANT_INTERRUPTS_ON_CTXSW.
> 
> This patch changes the check_context() function to
> check_and_switch_context() called from switch_mm(). In case of
> ASID-capable CPUs (ARMv6 onwards), if a new ASID is needed, it defers
> the __new_context() and cpu_switch_mm() calls to the post-lock switch
> hook where the interrupts are enabled. Setting the reserved TTBR0 was
> also moved to check_and_switch_context() from cpu_v7_switch_mm().
> 
> Signed-off-by: Catalin Marinas <catalin.marinas@....com>
> Cc: Russell King <linux@....linux.org.uk>
> ---
>  arch/arm/include/asm/mmu_context.h |   81 ++++++++++++++++++++++++++++--------
>  arch/arm/include/asm/system.h      |    2 +
>  arch/arm/include/asm/thread_info.h |    1 +
>  arch/arm/mm/context.c              |    4 +-
>  arch/arm/mm/proc-v7.S              |    3 -
>  5 files changed, 69 insertions(+), 22 deletions(-)
> 

< snip >

> diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
> index 2faff3b..d5334d9 100644
> --- a/arch/arm/mm/proc-v7.S
> +++ b/arch/arm/mm/proc-v7.S
> @@ -116,9 +116,6 @@ ENTRY(cpu_v7_switch_mm)
>  #ifdef CONFIG_ARM_ERRATA_430973
>  	mcr	p15, 0, r2, c7, c5, 6		@ flush BTAC/BTB
>  #endif
> -	mrc	p15, 0, r2, c2, c0, 1		@ load TTB 1
> -	mcr	p15, 0, r2, c2, c0, 0		@ into TTB 0
> -	isb
>  #ifdef CONFIG_ARM_ERRATA_754322
>  	dsb
>  #endif

I do not have a tree that matches this version of cpu_v7_switch_mm().
Can you point me at a tree that I can see this in?

-Frank

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