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Message-ID: <20111205112256.68e59434@jbarnes-desktop>
Date:	Mon, 5 Dec 2011 11:22:56 -0800
From:	Jesse Barnes <jbarnes@...tuousgeek.org>
To:	Linus Torvalds <torvalds@...ux-foundation.org>
Cc:	linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
	Kenji Kaneshige <kaneshige.kenji@...fujitsu.com>
Subject: Re: [git pull] PCI fixes

On Wed, 23 Nov 2011 15:02:01 -0800
Linus Torvalds <torvalds@...ux-foundation.org> wrote:

> On Wed, Nov 23, 2011 at 2:44 PM, Jesse Barnes <jbarnes@...tuousgeek.org> wrote:
> >
> > Nothing too exciting this time, mostly some minor fixes for things
> > normal people don't really hit.  Happy Thanksgiving.
> 
> Ugh. This looks bogus:
> 
> > Kenji Kaneshige (2):
> >      PCI: pciehp: wait 1000 ms before Link Training check
> 
> Look at that patch more closely. After the patch, the code looks like this:
> 
> 
>          if (ctrl->link_active_reporting)
>                  pcie_wait_link_active(ctrl);
>          else
>                  msleep(1000);
> 
> +	/*
> +	 * Need to wait for 1000 ms after Data Link Layer Link Active
> +	 * (DLLLA) bit reads 1b before sending configuration request.
> +	 * We need it before checking Link Training (LT) bit becuase
> +	 * LT is still set even after DLLLA bit is set on some platform.
> +	 */
> +	msleep(1000);
> 
> and I'm pretty sure you should remove the "else msleep(1000)" there.
> Doing the 1s wait *twice* seems entirely bogus, even if you are
> missing link_active_reporting. No?
> 
> I pulled it since I can't test it, but it really smells fishy to me.

Sure looks like it... Kenji-san, you went back and forth on this one a
little, can you confirm (and preferably test)?

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

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