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Message-ID: <4EE1C55B.9010708@ladisch.de>
Date: Fri, 09 Dec 2011 09:22:51 +0100
From: Clemens Ladisch <clemens@...isch.de>
To: Jeroen Van den Keybus <jeroen.vandenkeybus@...il.com>
CC: "Huang, Shane" <Shane.Huang@....com>,
Borislav Petkov <bp@...64.org>,
"Nguyen, Dong" <Dong.Nguyen@....com>, linux-kernel@...r.kernel.org
Subject: Re: Unhandled IRQs on AMD E-450
Jeroen Van den Keybus wrote:
> the ASM1083 can only be the cause if the Firewire controller is also
> on that bus.
The VT6308 is PCI, and you have only one bus.
>> It appears that some Deassert_INTx messages get lost on your system.
>> There are no indications of any other missing PCIe packets, so this
>> looks like a problem with the interrupt handling in your PCI/PCIe
>> bridge, the ASM1083 chip.
>
> Assuming this is the case, I modified the e1000 driver to explicitly
> set its IRQ line after 5 times having to send IRQ_NONE. (e1000_intr()
> code at end of this post). The result of this test is that the IRQ
> line indeed is set (in the next invocation, the ISR sees the forced
> RXT0 interrupt, clears the IRQ line and sends IRQ_HANDLED). But alas,
> the storm is not silenced at all.
>
> If the ASM108x was the problem, I suspect that explicitly raising and
> clearing the interrupt would have retriggered the INTx_Assert and
> INTx_Deassert messages ?
Yes.
> Meaning the bridge wouldn't be the problem.
It's possible that
1) the ASM1083 does not react to changes of the PCI interrupt line, or
2) the interrupt controller ignores INTx_Deassert messages.
I'm wondering what the difference between triggering an interrupt and
reloading the driver is that makes it work again. I'd guess that
reattaching the driver reinitializes the interrupt, which would point
to 2).
> If I understand correctly, the IO-APIC is not even used in this case ?
> (IRQ requests from e1000 all going through PCIe) Or is there also
> a virtual IO-APIC monitoring Assert and Deassert messages.
All PCI interrupts (whether 'real' lines in hardware or emulated with
PCIe messages) end up at the I/O-APIC.
> Is the BIOS responsible for writing a mapping for the PCI IRQs to MSIs
> into the ASM108x ?
MSIs are edge-triggered; their message is different from the (de)assert
messages used for PCI level-triggered interrupts.
AFAIK the interrupt handling in a PCI/PCIe bridge should work
transparently, i.e., the bridge does not need to be configured by
software.
The BIOS is responsible for telling the kernel about all interrupt
mappings, and ACPI takes part in initializing the I/O-APIC.
Check if a newer BIOS exists.
> (And BTW, should the linux1394-devel still be posted ?)
Your trigger-interrupt patch would also be possible with firewire-ohci.
> I'm thinking of immediately re-enabling the irqs after they've been
> disabled in spurious.c.
You could try free_irq/request_irq, but I guess you cannot do this
directly from inside an interrupt handler.
> I also think that the following posts may refer to the same problem:
>
> http://ubuntuforums.org/showthread.php?t=1883854
> https://lkml.org/lkml/2011/6/30/197
> https://lkml.org/lkml/2011/10/14/146
That's similar symptoms, but completely different hardware.
Regards,
Clemens
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