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Message-Id: <1324585155-13453-4-git-send-email-Kyle.D.Moffett@boeing.com>
Date:	Thu, 22 Dec 2011 15:19:11 -0500
From:	Kyle Moffett <Kyle.D.Moffett@...ing.com>
To:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc:	linuxppc-dev@...ts.ozlabs.org, devicetree-discuss@...ts.ozlabs.org,
	Kyle Moffett <Kyle.D.Moffett@...ing.com>,
	Grant Likely <grant.likely@...retlab.ca>,
	Rob Herring <rob.herring@...xeda.com>,
	Randy Dunlap <rdunlap@...otime.net>,
	Paul Mackerras <paulus@...ba.org>,
	Kumar Gala <galak@...nel.crashing.org>,
	Lucas De Marchi <lucas.demarchi@...fusion.mobi>,
	Stuart Yoder <stuart.yoder@...escale.com>,
	Josh Boyer <jwboyer@...ux.vnet.ibm.com>,
	Milton Miller <miltonm@....com>,
	Scott Wood <scottwood@...escale.com>,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 3/6] fsl/mpic: Create and document the "single-cpu-affinity" device-tree flag

The Freescale MPIC (and perhaps others in the future) is incapable of
routing non-IPI interrupts to more than once CPU at a time.  Currently
all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to
mpic_alloc(), but that information should really be present in the
device-tree.

Older board code can't rely on the device-tree having the property set,
but newer platforms won't need it manually specified in the code.

Signed-off-by: Kyle Moffett <Kyle.D.Moffett@...ing.com>
---
 .../devicetree/bindings/powerpc/fsl/mpic.txt       |    6 ++++++
 arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi            |    1 +
 arch/powerpc/sysdev/mpic.c                         |    8 +++++---
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
index ebafba2..b393ccf 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
@@ -64,6 +64,12 @@ PROPERTIES
           device-trees omit this property on MPIC nodes even when the MPIC is
           in fact big-endian, so certain boards override this property.
 
+  - single-cpu-affinity
+      Usage: optional
+      Value type: <empty>
+          If present the MPIC will be assumed to only be able to route
+          non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
+
 INTERRUPT SPECIFIER DEFINITION
 
   Interrupt specifiers consists of 4 cells encoded as
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index 47f2b67..658bd81 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -40,6 +40,7 @@ mpic: pic@...00 {
 	compatible = "fsl,mpic";
 	device_type = "open-pic";
 	big-endian;
+	single-cpu-affinity;
 };
 
 timer@...00 {
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9dd7f76..c297a52 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1183,11 +1183,13 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 	}
 
 	/* Read extra device-tree properties into the flags variable */
-	if (of_get_property(mpic->node, "big-endian", NULL))
+	if (of_get_property(node, "big-endian", NULL))
 		flags |= MPIC_BIG_ENDIAN;
-	if (of_get_property(mpic->node, "pic-no-reset", NULL))
+	if (of_get_property(node, "pic-no-reset", NULL))
 		flags |= MPIC_NO_RESET;
-	if (of_device_is_compatible(mpic->node, "fsl,mpic"))
+	if (of_get_property(node, "single-cpu-affinity", NULL))
+		flags |= MPIC_SINGLE_DEST_CPU;
+	if (of_device_is_compatible(node, "fsl,mpic"))
 		flags |= MPIC_FSL;
 
 	mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
-- 
1.7.7.3

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