linux-kernel - linux-next: manual merge of the driver-core tree with the s5p tree

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Date:	Wed, 28 Dec 2011 16:05:59 +1100
From:	Stephen Rothwell <sfr@...b.auug.org.au>
To:	Greg KH <greg@...ah.com>
Cc:	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Kay Sievers <kay.sievers@...y.org>,
	Thomas Abraham <thomas.abraham@...aro.org>,
	Kukjin Kim <kgene.kim@...sung.com>
Subject: linux-next: manual merge of the driver-core tree with the s5p tree

Hi Greg,

Today's linux-next merge of the driver-core tree got a conflict in
arch/arm/mach-s3c2440/clock.c between commit 0cfb26e1fb9d ("ARM: SAMSUNG:
register uart clocks to clock lookup list") from the s5p tree and commit
4a858cfc9af8 ("arm: convert sysdev_class to a regular subsystem") from
the driver-core tree.

Just context changes.  I fixed it up (see below) and can carry the fix as
necessary.
-- 
Cheers,
Stephen Rothwell                    sfr@...b.auug.org.au

diff --cc arch/arm/mach-s3c2440/clock.c
index c9879af,d895759..0000000
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@@ -110,47 -107,7 +109,47 @@@ static struct clk s3c2440_clk_ac97 = 
  	.ctrlbit	= S3C2440_CLKCON_CAMERA,
  };
  
 +static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
 +{
 +	unsigned long ucon0, ucon1, ucon2, divisor;
 +
 +	/* the fun of calculating the uart divisors on the s3c2440 */
 +	ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
 +	ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
 +	ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
 +
 +	ucon0 &= S3C2440_UCON0_DIVMASK;
 +	ucon1 &= S3C2440_UCON1_DIVMASK;
 +	ucon2 &= S3C2440_UCON2_DIVMASK;
 +
 +	if (ucon0 != 0)
 +		divisor = (ucon0 >> S3C2440_UCON_DIVSHIFT) + 6;
 +	else if (ucon1 != 0)
 +		divisor = (ucon1 >> S3C2440_UCON_DIVSHIFT) + 21;
 +	else if (ucon2 != 0)
 +		divisor = (ucon2 >> S3C2440_UCON_DIVSHIFT) + 36;
 +	else
 +		/* manual calims 44, seems to be 9 */
 +		divisor = 9;
 +
 +	return clk_get_rate(clk->parent) / divisor;
 +}
 +
 +static struct clk s3c2440_clk_fclk_n = {
 +	.name		= "fclk_n",
 +	.parent		= &clk_f,
 +	.ops		= &(struct clk_ops) {
 +		.get_rate	= s3c2440_fclk_n_getrate,
 +	},
 +};
 +
 +static struct clk_lookup s3c2440_clk_lookup[] = {
 +	CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
 +	CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
 +	CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
 +};
 +
- static int s3c2440_clk_add(struct sys_device *sysdev)
+ static int s3c2440_clk_add(struct device *dev)
  {
  	struct clk *clock_upll;
  	struct clk *clock_h;

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