linux-kernel - Re: [PATCH v3 2/2] dma/imx-sdma: use writel to write register when enable a channel

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAMPhdO9rJEMKyyL_SMkb7XsRdd3G_A63biQ=Uu3WUD0geJTwYw@mail.gmail.com>
Date:	Thu, 5 Jan 2012 17:34:37 +0800
From:	Eric Miao <eric.miao@...aro.org>
To:	Richard Zhao <richard.zhao@...escale.com>
Cc:	Shawn Guo <shawn.guo@...aro.org>, Arnd Bergmann <arnd@...db.de>,
	patches@...aro.org, vinod.koul@...el.com,
	linux-kernel@...r.kernel.org, kernel@...gutronix.de,
	dan.j.williams@...el.com, Richard Zhao <richard.zhao@...aro.org>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 2/2] dma/imx-sdma: use writel to write register when
 enable a channel

On Thu, Jan 5, 2012 at 5:19 PM, Richard Zhao <richard.zhao@...escale.com> wrote:
> Hi Shawn,
>
> On Thu, Jan 05, 2012 at 05:23:17PM +0800, Shawn Guo wrote:
>> On Thu, Jan 05, 2012 at 03:59:22PM +0800, Richard Zhao wrote:
>> > dma_alloc_coherent memory may be bufferable when set
>> > CONFIG_ARM_DMA_MEM_BUFFERABLE. We need to add nececcary
>> > memory barrier. writel implicitly call wmb in such case.
>> >
>> > Signed-off-by: Richard Zhao <richard.zhao@...aro.org>
>> > ---
>> >  drivers/dma/imx-sdma.c |    2 +-
>> >  1 files changed, 1 insertions(+), 1 deletions(-)
>> >
>> > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
>> > index c2bc4f1..e987468 100644
>> > --- a/drivers/dma/imx-sdma.c
>> > +++ b/drivers/dma/imx-sdma.c
>> > @@ -396,7 +396,7 @@ static int sdma_config_ownership(struct sdma_channel *sdmac,
>> >
>> >  static void sdma_enable_channel(struct sdma_engine *sdma, int channel)
>> >  {
>> > -   __raw_writel(1 << channel, sdma->regs + SDMA_H_START);
>> > +   writel(1 << channel, sdma->regs + SDMA_H_START);
>> >  }
>> >
>>
>> As educated by Arnd, generally it's safer to use pair of readl/writel
>> than __raw_readl/__raw_writel in driver.  I'm wondering if it's a good
>> opportunity for us to change the pair all over this driver.
> Russel mentioned that too. But I cannot understand.
> If CONFIG_ARM_DMA_MEM_BUFFERABLE, readl/writel always call rmb/wmb. Do
> we realy need it? It might affect performance.

It's generally a good idea to use readl() and writel() unless it's performance
critical, e.g. where endian conversion is not necessary and IO read/write
order doesn't matter.

As MT_DEVICE is strongly ordered, I think it'll be OK for __raw_{read,write}l()
to be used for those ioremap() register accesses, not necessarily to those
ioremap_*() version though.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/